74LS73 datasheet, 74LS73 pdf, 74LS73 data sheet, datasheet, data sheet, pdf, Fairchild Semiconductor, Dual Negative-Edge-Triggered Master-Slave J-K. Texas Instruments 74ls73 Flip Flops are available at Mouser Electronics. Mouser offers inventory, pricing, & datasheets for Texas Instruments 74ls73 Flip Flops. Part Number: 74LS73, Maunfacturer: National Semiconductor, Part Family: 74, File type: PDF, Document: Datasheet – semiconductor.
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Meaning it has two JK flip flops inside it and each can be used individually based on our application.
The term JK flip flop comes after its inventor Jack Kilby. The JK flip flops are considered to be the most efficient flip-flop and can be used for certain applications on its own.
The flip-flops are also called as latching devices meaning it can remember one single bit of data and latch the output based on it, due to this property they are commonly used as shift registers, control registers, storage registers or where ever a small memory is required. The JK flip flop is considered to be more suitable for practical application because of its truth table that is the output of the flip flop will be dattasheet for all types of inputs.
74LS73 View Datasheet(PDF) – Motorola => Freescale
So if you are looking for a IC for latching purpose or to act as a small programmable memory for you project then this IC might be the right choice for you. The below circuit shows a typical sample connection for the JK datasheef. Note that the input pins are pulled down to ground through a 1k resistor, this way we can avoid the pin in floating condition.
That is the pin will held to ground when the button is not pressed and when the button is pressed the pin will be held to supply voltage. The reset button should be pulled up through a 1K resistor and when grounded will reset the flip-flop.
74LS73 Datasheet(PDF) – Fairchild Semiconductor
The clock signal for the JK flip-flop is responsible for changing the state of the output. The flip-flop will change its output only during the rising edge of the clock signal. The clock signal here is just a push button but can be type of datashheet like a PWM signal.
The output state of the flip flops can be determined form the truth table below.
Normally during regular operation of the IC the reset pin will be set high and the clock pulse of known frequency will be supplied to the clock pin, then the value o J and K will be varied based on the input signals and the respective output will be obtained on the Q and Q bar pins.
This region of operation in highlighted in red colour on the Truth table above. Submitted by admin on 22 May Complete Technical Details can be found at the datasheet given at the end of this page.
The below circuit shows a typical sample connection for datasneet JK flip-flop The J and K pins are the input pins for the Flip-Flop and the Q and Q bar pins are the output pins. TL — Programmable Reference Voltage.